Paper Details

Reference:

Reza Azimi, Michael Stumm, and Robert W. Wisniewski,
"Online performance analysis by statistical sampling of microprocessor performance counters",
In Proceedings of the 19th International Conference on Supercomputing (ICS'05), Cambridge, MA, USA, ACM, New York, NY, USA, June, 2005, pp. 101–110.

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Abstract:

Hardware performance counters (HPCs) are increasingly being used to analyze performance and identify the causes of performance bottlenecks. However, HPCs are difficult to use for several reasons. Microprocessors do not provide enough counters to simultaneously monitor the many different types of events needed to form an over-all understanding of performance. Moreover, HPCs primarily count low-level micro-architectural events from which it is difficult to extract high-level insight required for identifying causes of performance problems.

We describe two techniques that help overcome these difficulties, allowing HPCs to be used in dynamic real-time optimizers. First, statistical sampling is used to dynamically multiplex HPCs and make a larger set of logical HPCs available. Using real programs, we show experimentally that it is possible through this sampling to obtain counts of hardware events that are statistically similar (within 15%) to complete non-sampled counts, thus allowing us to provide a much larger set of logical HPCs. Second, we observe that stall cycles are a primary source of inefficiencies, and hence they should be major targets for software optimization. Based on this observation, we build a simple model in real-time that speculatively associates each stall cycle to a processor component that likely caused the stall. The information needed to produce this model is obtained using our HPC multiplexing facility to monitor a large number of hardware components simultaneously. Our analysis shows that even in an out-of-order superscalar micro-processor such a speculative approach yields a fairly accurate model with run-time overhead for collection and computation of under 2%.

These results demonstrate that we can effective analyze on-line performance of application and system code running at full speed. The stall analysis shows where performance is being lost on a given processor.

Keywords:

Operating systems, hardware performance counters, hardware performance monitors

Reference Info:

DOI: 10.1145/1088149.1088163
ACMid: 1088163
ISBN: 1-59593-167-8

BibTeX:

@inproceedings(Azimi-ICS05,
    author = {Reza Azimi and Michael Stumm and Robert W. Wisniewski},
    title = {Online performance analysis by statistical sampling of microprocessor performance counters},
    booktitle = {Proceedings of the 19th International Conference on Supercomputing (\textbf{ICS'05})},
    location = {Cambridge, MA, USA},
    organization = {ACM},
    address = {New York, NY, USA},
    month = {June},
    year = {2005},
    pages = {101-110},
    doi = {10.1145/1088149.1088163},
    isbn = {1-59593-167-8},
    keywords = {Operating systems, hardware performance counters, hardware performance monitors}
)